Error-correcting code and process for fast read-error correction

Subject matter, for example, disclosed herein relates to an embodiment of a process, system, device, or article involving error correction codes. In a particular embodiment, an error-correcting device may comprise an input port to receive an error correcting code (ECC) based, at least in part, on co...

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Format Patent
LanguageEnglish
Published 25.03.2014
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Summary:Subject matter, for example, disclosed herein relates to an embodiment of a process, system, device, or article involving error correction codes. In a particular embodiment, an error-correcting device may comprise an input port to receive an error correcting code (ECC) based, at least in part, on contents of a memory array; a nonlinear computing block to process the ECC to provide a plurality of signals representing a nonlinear portion of an error locator polynomial; and a linear computing block to process the ECC concurrently with processing the ECC to provide a plurality of signals representing the nonlinear portion of the error locator polynomial, to provide a plurality of signals representing a linear portion of the error locator polynomial.