Specialized processing block for programmable logic device

A specialized processing block for a programmable logic device includes circuitry for performing multiplications and sums thereof, as well as circuitry for performing floating point operations. The floating point circuitry preferably includes rounding and normalization circuitry. To perform mantissa...

Full description

Saved in:
Bibliographic Details
Main Authors Lee, Kwan Yee Martin, Langhammer, Martin, Nguyen, Triet M, Lin, Yi-Wen
Format Patent
LanguageEnglish
Published 30.10.2012
Online AccessGet full text

Cover

Loading…
More Information
Summary:A specialized processing block for a programmable logic device includes circuitry for performing multiplications and sums thereof, as well as circuitry for performing floating point operations. The floating point circuitry preferably includes rounding and normalization circuitry. To perform mantissa multiplications, the floating point circuitry preferably relies on the aforementioned multipliers of the specialized processing block.