Read-write control of a FIFO memory with packet discard

A write controller controls writing of packet data to a memory, and a read controller controls reading of packet data from the memory. The write controller signals the read controller if a packet is to be discarded. In response to a discard signal from the write controller, the read controller check...

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Bibliographic Details
Main Author Nelson, IV, Roscoe Conkling
Format Patent
LanguageEnglish
Published 09.10.2012
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Summary:A write controller controls writing of packet data to a memory, and a read controller controls reading of packet data from the memory. The write controller signals the read controller if a packet is to be discarded. In response to a discard signal from the write controller, the read controller checks whether it is in the midst of processing the packet to be discarded. If the read controller has yet to process the packet to be discarded, then no corrective action is required. However, if the read controller is in the midst of processing the packet to be discarded, then the read controller adjusts its memory read pointer to point to the position in the memory at which it began reading the packet to be discarded.