Dual interlayer dielectric stressor integration with a sacrificial underlayer film stack
A method for making a semiconductor device is provided by (a) providing a substrate having first and second gate structures thereon; (b) forming an underlayer over the first and second gate structures; (c) removing the underlayer from the first gate structure; (d) forming a first stressor layer over...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
21.08.2012
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Online Access | Get full text |
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Summary: | A method for making a semiconductor device is provided by (a) providing a substrate having first and second gate structures thereon; (b) forming an underlayer over the first and second gate structures; (c) removing the underlayer from the first gate structure; (d) forming a first stressor layer over the first and second gate structures; and (e) selectively removing the first stressor layer from the second gate structure through the use of a first etch which is selective to the underlayer. |
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