Method and apparatus for coherent device initialization and access
A method and apparatus for enabling usage of an accelerator device in a processor socket is herein described. A set of inter-processor messages is utilized to initialize a configuration/memory space of the accelerator device. As an example, a first set of inter-processor interrupts (IPIs) is sent to...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
20.12.2011
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Online Access | Get full text |
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