Methods of patterning insulating layers using etching techniques that compensate for etch rate variations

Methods of forming integrated circuit devices include forming an integrated circuit substrate having an electrically insulating layer thereon and forming a mask layer pattern having at least first and second openings of different size therein, on the electrically insulating layer. First and second p...

Full description

Saved in:
Bibliographic Details
Main Authors Park, Wan-jae, Kumar, Kaushik Arun, Linville, Joseph Edward, Lisi, Anthony David, Srivastava, Ravi Prakash, Wendt, Hermann Willhelm
Format Patent
LanguageEnglish
Published 15.11.2011
Online AccessGet full text

Cover

More Information
Summary:Methods of forming integrated circuit devices include forming an integrated circuit substrate having an electrically insulating layer thereon and forming a mask layer pattern having at least first and second openings of different size therein, on the electrically insulating layer. First and second portions of the electrically insulating layer extending opposite the first and second openings, respectively, are simultaneously etched at first and second different etch rates. This etching yields a first trench extending adjacent the first opening that is deeper than a second trench extending adjacent the second opening. Then, the bottoms of the first and second trenches are simultaneously etched to substantially the same depths using an etching process that compensates for the first and second different etch rates.