Methods of fabricating flash memory devices comprising forming a silicide on exposed upper and side surfaces of a control gate

• Main Authors: Choi, Jong-wan, Choi, Yong-soon, Lee, Bo-young, Hong, Eunkee, Baek, Eun-kyung, Goo, Ju-seon
• Format: Patent
• Language: English
• Published: 25.10.2011

Provided are methods of fabricating flash memory devices that may prevent a short circuit from occurring between cell gate lines. Methods of fabricating such flash memory devices may include forming gate lines including a series of multiple cell gate lines and multiple selection gate lines. Each gate line may include a stacked structure of a tunnel insulating layer, a floating gate, a gate insulating layer, and/or a polysilicon layer operable to be a control gate, all formed on a semiconductor substrate. Methods may include forming a first insulating layer that selectively fills gaps between the cell gate lines from the bottom up and between adjacent ones of the cell gate lines and the selection gate lines, and does not fill a space located on outer sides of the selection gate lines that are opposite the plurality of cell gate lines. A spacer may be formed on the outer sides of the selection gate lines that are opposite to the cell gate lines, after forming the first insulating layer. A second insulating layer may be formed in a space where the spacer is formed.