Impedance adjustment circuit
An impedance adjustment circuit according to the present invention includes a first input buffer which detects that an input signal exceeds VREFA, a second input buffer which detects that the input signal exceeds VREFB, VREFB being higher than VREFA, a counter circuit A which performs count based on...
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Main Author | |
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Format | Patent |
Language | English |
Published |
18.10.2011
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Online Access | Get full text |
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Summary: | An impedance adjustment circuit according to the present invention includes a first input buffer which detects that an input signal exceeds VREFA, a second input buffer which detects that the input signal exceeds VREFB, VREFB being higher than VREFA, a counter circuit A which performs count based on an output from the first input buffer, a counter circuit B which performs count based on an output from the second input buffer, and a termination resistor control circuit which controls impedance of a termination resistor provided in a termination of a transmission path based on the count in the counter circuit A and the count in the counter circuit B. |
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