Integrated circuit system with hierarchical capacitor and method of manufacture thereof

A method of manufacture of an integrated circuit system includes: providing a substrate including front-end-of-line circuitry; forming a first group of metal layers including a first finger and a second finger over the substrate utilizing a first design rule, the first group of metal layers being fo...

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Bibliographic Details
Main Authors Chu, Shao-fu Sanford, Zhang, Shaoqing, Chew, Johnny Kok Wai, Ng, Chit Hwei
Format Patent
LanguageEnglish
Published 20.09.2011
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Summary:A method of manufacture of an integrated circuit system includes: providing a substrate including front-end-of-line circuitry; forming a first group of metal layers including a first finger and a second finger over the substrate utilizing a first design rule, the first group of metal layers being formed without a finger via; forming a second group of metal layers including a first finger, a second finger, and a finger via over the first group of metal layers utilizing a second design rule that is larger than the first design rule; and interconnecting the first group of metal layers with the second group of metal layers to form a capacitor.