Content addressable memory

• Main Authors: Chen, Chieh Chi, Wang, Sheng-De
• Format: Patent
• Language: English
• Published: 31.05.2011

For receiving an input data, a pattern data and a data clock signal and outputting a hit signal and an address signal, a content addressable memory includes a plurality of content addressable memory units connected in series, each content addressable memory unit being adapted to receive the input data and the data clock signal and to output a comparison result signal, and an encoder coupled to the comparison result signal of each content addressable memory unit and adapted for outputting a hit signal and a memory address signal subject to the comparison result signal received.