Hybrid semiconductor structure

A method for the fabrication of a semiconductor structure that includes areas that have different crystalline orientation and semiconductor structure formed thereby. The disclosed method allows fabrication of a semiconductor structure that has areas of different semiconducting materials. The method...

Full description

Saved in:
Bibliographic Details
Main Authors Bjoerk, Mikael T, Hayden, Oliver, Riel, Heike E, Riess, Walter Heinrich, Schmid, Heinz
Format Patent
LanguageEnglish
Published 24.05.2011
Online AccessGet full text

Cover

Abstract A method for the fabrication of a semiconductor structure that includes areas that have different crystalline orientation and semiconductor structure formed thereby. The disclosed method allows fabrication of a semiconductor structure that has areas of different semiconducting materials. The method employs templated crystal growth using a Vapor-Liquid-Solid (VLS) growth process. A silicon semiconductor substrate having a first crystal orientation direction is etched to have an array of holes into its surface. A separation layer is formed on the inner surface of the hole for appropriate applications. A growth catalyst is placed at the bottom of the hole and a VLS crystal growth process is initiated to form a nanowire. The resultant nanowire crystal has a second different crystal orientation which is templated by the geometry of the hole.
AbstractList A method for the fabrication of a semiconductor structure that includes areas that have different crystalline orientation and semiconductor structure formed thereby. The disclosed method allows fabrication of a semiconductor structure that has areas of different semiconducting materials. The method employs templated crystal growth using a Vapor-Liquid-Solid (VLS) growth process. A silicon semiconductor substrate having a first crystal orientation direction is etched to have an array of holes into its surface. A separation layer is formed on the inner surface of the hole for appropriate applications. A growth catalyst is placed at the bottom of the hole and a VLS crystal growth process is initiated to form a nanowire. The resultant nanowire crystal has a second different crystal orientation which is templated by the geometry of the hole.
Author Schmid, Heinz
Hayden, Oliver
Bjoerk, Mikael T
Riel, Heike E
Riess, Walter Heinrich
Author_xml – sequence: 1
  givenname: Mikael T
  surname: Bjoerk
  fullname: Bjoerk, Mikael T
– sequence: 2
  givenname: Oliver
  surname: Hayden
  fullname: Hayden, Oliver
– sequence: 3
  givenname: Heike E
  surname: Riel
  fullname: Riel, Heike E
– sequence: 4
  givenname: Walter Heinrich
  surname: Riess
  fullname: Riess, Walter Heinrich
– sequence: 5
  givenname: Heinz
  surname: Schmid
  fullname: Schmid, Heinz
BookMark eNrjYmDJy89L5WSQ86hMKspMUShOzc1Mzs9LKU0uyS9SKC4pAjJKi1J5GFjTEnOKU3mhNDeDgptriLOHbmlxQWJJal5JcXx6USKIMjC3NDE3tTAwJkIJAOx6J9M
ContentType Patent
CorporateAuthor International Business Machines Corporation
CorporateAuthor_xml – name: International Business Machines Corporation
DBID EFH
DatabaseName USPTO Issued Patents
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EFH
  name: USPTO Issued Patents
  url: http://www.uspto.gov/patft/index.html
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
ExternalDocumentID 07947580
GroupedDBID EFH
ID FETCH-uspatents_grants_079475803
IEDL.DBID EFH
IngestDate Sun Mar 05 22:31:09 EST 2023
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-uspatents_grants_079475803
OpenAccessLink https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7947580
ParticipantIDs uspatents_grants_07947580
PatentNumber 7947580
PublicationCentury 2000
PublicationDate 20110524
PublicationDateYYYYMMDD 2011-05-24
PublicationDate_xml – month: 05
  year: 2011
  text: 20110524
  day: 24
PublicationDecade 2010
PublicationYear 2011
References Samuelson et al. (7432522) 20081000
Yue Wu, et al., "Controlled Growth and Structures of Molecular-Scale .. . ", Nano Letters, 2004, vol. 4, No. 3, pp. 433-436.
Fulin Xiong, et al., "Liquid-metal-mediated homoepitaxial . . . ", Appl. Phys. Lett. 59, (27), Dec. 1991.
Kok-Keong Lew, et al., "Template-directed vapor-liquid-solid growth of silicon nanowires", J. Vax. Sci. Technol. B 20 (1), Jan./Feb. 2002, pp. 389-392.
Volker Schmidt, et al., "Diameter-Dependent Growth Direction . . . ", Nano Letters, 2005, vol. 5, No. 5, pp. 931-935.
Bakkers et al. (2007/0257246) 20071100
Hemanth Jagannatha.N, et al., "Templated germanium nanowire synthesis using oriented . . . " J. Vac. Sci. Technol. B 24(5), Sep./Oct. 2006, pp. 2220-2224.
Hong Jin Fan, et al., "Semiconductor Nanowires: From Self-Organization to Patterned Growth", www.small-journal.com, 2006, pp. 700-717.
References_xml – year: 20071100
  ident: 2007/0257246
  contributor:
    fullname: Bakkers et al.
– year: 20081000
  ident: 7432522
  contributor:
    fullname: Samuelson et al.
Score 2.8063066
Snippet A method for the fabrication of a semiconductor structure that includes areas that have different crystalline orientation and semiconductor structure formed...
SourceID uspatents
SourceType Open Access Repository
Title Hybrid semiconductor structure
URI https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7947580
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfVxLSwMxEB5qEbQnRcX6KHvwGt262ezkXLoEQelBobfS3WS8aLbsbpH-eye7UrzoNYHJDJlkHnzzAdypUlNMSgkrrRJySlYgKSliSl2ytrLUZWjoP78o8yaflulyAGY_C_PJz0hsWJfmftts2qoDV_L33l-86MmfA0egD-wDX_6jWtuFpQf2K059uXg_wDhA--a5GcERi-CUzbfNr6CRn8Dhols9hYHzZzAxuzAdFTUBjl75wLNa1VHP37qt3TlE-fx1ZsRe2Oq9DiCVVfxzaHIBQy7W3SVEyZRtVuiywhYSU9QZuYwk6gKxRE1jGP8p5uqfvWs47ruZqXiUNzBk5dwth8O2mHS2fgPIwmtx
link.rule.ids 230,309,783,805,888,64374
linkProvider USPTO
linkToPdf http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfVw7T8MwED5VBfGYQIAoj5KB1ZASx7FnaGReVQaQukVNbLOAUyWpEP-euwRVLLDa0vlOftzD330Al6JULnRCMMONYHziDJNOcBa62EYLw0tVUkH_eSb0K3-Yx_MB6HUvzAdeI7ZEXZqrVbNsqw5cic97v_GsJ38mjkBP7AOf_r1amMy4azxXGPpi8r5BX1HEoj9N9S5soxAM2nzb_HIb6R5sZt3oPgysP4Cx_qL-qKAhQHrliWm1qoOewXVV20MI0unLrWZrYflbTTCVPPxZNjqCIabr9hiCaIJWC2mTwhRcxlIlziaOS1VIWUrlRjD6U8zJP3MXsJXdpfnT_ezxFHb60mbMbvgZDFFPe46-sS3GndnfPFVubA
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Hybrid+semiconductor+structure&rft.inventor=Bjoerk%2C+Mikael+T&rft.inventor=Hayden%2C+Oliver&rft.inventor=Riel%2C+Heike+E&rft.inventor=Riess%2C+Walter+Heinrich&rft.inventor=Schmid%2C+Heinz&rft.number=7947580&rft.date=2011-05-24&rft.externalDBID=n%2Fa&rft.externalDocID=07947580