Process for reversing tone of patterns on integerated circuit and structural process for nanoscale fabrication

• Main Authors: Clevenger, Lawrence A, Darnon, Maxime, Lisi, Anthony D, Nitta, Satya V
• Format: Patent
• Language: English
• Published: 10.05.2011

A process to produce an airgap on a substrate having a dielectric layer comprises defining lines by lithography where airgaps are required. The lines' dimensions are shrunk by a trimming process (isotropic etching). The tone of the patterns is reversed by applying a planarizing layer which is etched down to the top of the patterns. The photoresist is removed, leading to sub-lithographic trenches which are transferred into a cap layer and eventually into the dielectric between two metal lines. The exposed dielectric is eventually damaged, and is etched out, leading to airgaps between metal lines. The gap is sealed by the pinch-off occurring during the deposition of the subsequent dielectric.