Methods for automatically generating fault mitigation strategies for electronic system designs

Approaches for generating a design of an electronic system are disclosed. In one approach, for each of one or more components of a first specification of the design, an error mitigation technique is selected from among multiple different error mitigation techniques in response to user-specified data...

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Bibliographic Details
Main Authors Sundararajan, Prasanna, Corbett, John D, Bennett, David W, Mason, Jeffrey M
Format Patent
LanguageEnglish
Published 19.04.2011
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Summary:Approaches for generating a design of an electronic system are disclosed. In one approach, for each of one or more components of a first specification of the design, an error mitigation technique is selected from among multiple different error mitigation techniques in response to user-specified data associated with the first specification of the design. A second specification of the design is automatically generated from the first specification. The second specification includes error mitigation logic corresponding to each selected error mitigation technique for each of the one or more components. The second specification of the design is stored for subsequent processing.