Residue free patterned layer formation method applicable to CMOS structures

• Main Authors: Chudzik, Michael, Doris, Bruce B, Henson, William K, Yan, Hongwen, Zhang, Ying
• Format: Patent
• Language: English
• Published: 04.01.2011

A method for forming a microelectronic structure uses a mask layer located over a target layer. The target layer may be etched while using the mask layer as an etch mask to form an end tapered target layer from the target layer. An additional target layer may be formed over the end tapered target layer and masked with an additional mask layer. The additional target layer may be etched to form a patterned additional target layer separated from the end tapered target layer and absent an additional target layer residue adjacent the end tapered target layer. The method is useful for fabricating CMOS structures including nFET and pFET gate electrodes comprising different nFET and pFET gate electrode materials.