Semiconductor device for performing mount test in response to internal test mode signals
A semiconductor device includes: a plurality of pins for receiving a plurality of external mount test signals; and a signal generating unit for generating a plurality of internal test mode signals in response the external mount test signals, wherein the semiconductor device enters into a mount test...
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| Format | Patent |
| Language | English |
| Published |
21.12.2010
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| Online Access | Get full text |
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| Summary: | A semiconductor device includes: a plurality of pins for receiving a plurality of external mount test signals; and a signal generating unit for generating a plurality of internal test mode signals in response the external mount test signals, wherein the semiconductor device enters into a mount test mode in response to the internal test mode signals for evaluating an operation of the semiconductor device mounted on an actual application device. |
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