Lightweight and compact through-silicon via stack package with excellent electrical connections and method for manufacturing the same
A through-silicon via stack package contains package units. Each package unit includes a semiconductor chip; a through-silicon via formed in the semiconductor chip; a first metal line formed on an upper surface and contacting a portion of a top surface of the through-silicon via; and a second metal...
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| Main Author | |
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| Format | Patent |
| Language | English |
| Published |
07.12.2010
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| Online Access | Get full text |
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| Summary: | A through-silicon via stack package contains package units. Each package unit includes a semiconductor chip; a through-silicon via formed in the semiconductor chip; a first metal line formed on an upper surface and contacting a portion of a top surface of the through-silicon via; and a second metal line formed on a lower surface of the semiconductor chip and contacting a second portion of a lower surface of the through-silicon via. When package units are stacked, the second metal line formed on the lower surface of the top package unit and the first metal line formed on the upper surface of the bottom package unit are brought into contact with the upper surface of the through-silicon via of the bottom package unit and the lower surface of the through-silicon via of the top package unit, respectively. The stack package is lightweight and compact, and can form excellent electrical connections. |
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