Implementing enhanced dual mode SRAM performance screen ring oscillator

A method and circuit for implementing an enhanced dual-mode static random access memory (SRAM) performance screen ring oscillator (PSRO), and a design structure on which the subject circuit resides are provided. The dual-mode SRAM PSRO includes a plurality of SRAM base blocks connected together in a...

Full description

Saved in:
Bibliographic Details
Main Authors Adams, Chad Allen, Christensen, Todd Alan, Freiburger, Peter Thomas, Hebig, Travis Reynold
Format Patent
LanguageEnglish
Published 16.11.2010
Online AccessGet full text

Cover

More Information
Summary:A method and circuit for implementing an enhanced dual-mode static random access memory (SRAM) performance screen ring oscillator (PSRO), and a design structure on which the subject circuit resides are provided. The dual-mode SRAM PSRO includes a plurality of SRAM base blocks connected together in a chain. Each of the plurality of SRAM base blocks includes an eight-transistor (8T) SRAM cell, a local evaluation circuit and a logic function coupled to the SRAM cell. The eight-transistor (8T) static random access memory (SRAM) cell is an unmodified 8T SRAM cell. The dual-mode SRAM PSRO includes one mode of operation, where the output frequency is determined by write-through performance of the 8T SRAM cell; and another mode of operation, where the output frequency is determined by read performance of the 8T SRAM cell.