PCB circuit modification from multiple to individual chip enable signals

A semiconductor package is discussed having a single CE signal during electrical test and a plurality of CE signals during normal operation thereafter. After electrical testing of the memory die during fabrication, the electrical traces carrying the single CE signal from the memory test pad matrix t...

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Bibliographic Details
Main Authors McCarthy, Michael, Ye, Ning, Kini, Naveen
Format Patent
LanguageEnglish
Published 17.08.2010
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Summary:A semiconductor package is discussed having a single CE signal during electrical test and a plurality of CE signals during normal operation thereafter. After electrical testing of the memory die during fabrication, the electrical traces carrying the single CE signal from the memory test pad matrix to each of the memory die may be severed. Severing the electrical traces from the memory test pad matrix electrically isolates the multiple electrical traces between the controller die and memory die, and allows separate and individual CE signals between the controller die and memory die during normal usage of the memory die.