Method for forming interconnection line in semiconductor device and interconnection line structure

Methods for forming an interconnection line and interconnection line structures are disclosed. The method includes forming an interlayer insulating layer on a semiconductor substrate, wherein the interlayer insulating layer is formed of a carbon-doped low-k dielectric layer. An oxidation barrier lay...

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Bibliographic Details
Main Authors Lee, Kyoung-Woo, Shin, Hong-Jae, Kim, Jae-Hak, Wee, Young-Jin, Lee, Seung-Jin, Park, Ki-Kwan
Format Patent
LanguageEnglish
Published 22.12.2009
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Summary:Methods for forming an interconnection line and interconnection line structures are disclosed. The method includes forming an interlayer insulating layer on a semiconductor substrate, wherein the interlayer insulating layer is formed of a carbon-doped low-k dielectric layer. An oxidation barrier layer is formed on the interlayer insulating layer. An oxide capping layer is formed on the oxidation barrier layer. A via hole is in the oxide capping layer, the oxidation barrier, and the interlayer insulating layer. A conductive layer pattern is formed within the via hole.