Signal processor with a signal strength detection circuit that is coupled to a loop of an analog to digital converter
A signal processing circuit has an analog to digital converter for providing a digital signal to a processor from an analog input signal that is susceptible to variations in signal power, e.g. from a radio front end. The device has a variable gain amplifier controlled by a gain control signal based...
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| Format | Patent |
| Language | English |
| Published |
20.10.2009
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| Online Access | Get full text |
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| Summary: | A signal processing circuit has an analog to digital converter for providing a digital signal to a processor from an analog input signal that is susceptible to variations in signal power, e.g. from a radio front end. The device has a variable gain amplifier controlled by a gain control signal based on detected signal strength. The analog to digital converter has a loop comprising a loop filter for processing the input signal. A signal strength detection circuit is provided for generating the gain control signal, which signal strength detection circuit has loop signal detector for detecting the signal strength from the loop. Hence a received signal strength indicator RSSI is directly coupled to the analog to digital converter, avoiding the delay of signal strength detection in the digital processor. |
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