Isolation spacer for thin SOI devices

A semiconductor device comprises a semiconductor mesa overlying a dielectric layer, a gate stack formed overlying the semiconductor mesa, and an isolation spacer formed surrounding the semiconductor mesa and filling any undercut region at edges of the semiconductor mesa.

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Bibliographic Details
Main Authors Ko, Chih-Hsin, Lee, Wen-Chin, Yeo, Yee-Chia, Ke, Chung-Hu
Format Patent
LanguageEnglish
Published 01.09.2009
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Summary:A semiconductor device comprises a semiconductor mesa overlying a dielectric layer, a gate stack formed overlying the semiconductor mesa, and an isolation spacer formed surrounding the semiconductor mesa and filling any undercut region at edges of the semiconductor mesa.