Column address enable signal generation circuit for semiconductor memory device

A semiconductor memory device includes a clock period detector, a column address enable signal generator, and a multiplexing circuit. The clock period detector detects a period of an external clock in response to a pulse width information signal having a pulse width corresponding to that of the exte...

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Main Author Kim, Bo-Yeun
Format Patent
LanguageEnglish
Published 31.03.2009
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Abstract A semiconductor memory device includes a clock period detector, a column address enable signal generator, and a multiplexing circuit. The clock period detector detects a period of an external clock in response to a pulse width information signal having a pulse width corresponding to that of the external clock. The column address enable signal generator generates a column address enable signal activated in response to a column access signal. The multiplexing circuit multiplexes points of time of inactivation of the column access signal in response to the detected signal outputted from the clock period detector.
AbstractList A semiconductor memory device includes a clock period detector, a column address enable signal generator, and a multiplexing circuit. The clock period detector detects a period of an external clock in response to a pulse width information signal having a pulse width corresponding to that of the external clock. The column address enable signal generator generates a column address enable signal activated in response to a column access signal. The multiplexing circuit multiplexes points of time of inactivation of the column access signal in response to the detected signal outputted from the clock period detector.
Author Kim, Bo-Yeun
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Choi et al. (2002/0060934) 20020500
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Zheng (6061291) 20000500
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Ho (2005/0201183) 20050900
Korean Notice of Allowance issued in Korean Patent Application No. KR 10-2006-0134372, dated Sep. 22, 2008.
(10-2005-0049236) 20050500
Ko (2005/0105363) 20050500
Kim et al. (6987705) 20060100
Jang (6219292) 20010400
(10-2005-0055228) 20050600
Korean Office Action, with English translation, issued in Korean Patent Application No. KR 10-2006-0134372, mailed Dec. 10, 2007.
An (2005/0166097) 20050700
(2004-246958) 20040900
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Snippet A semiconductor memory device includes a clock period detector, a column address enable signal generator, and a multiplexing circuit. The clock period detector...
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Title Column address enable signal generation circuit for semiconductor memory device
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