Efficient execution and emulation of bit scan operations
Methods are disclosed to implement bit scan operations using properties of two's complement arithmetic and compute zero index instructions. A data value may be provided and the most-significant or least-significant bit may be determined using the methods set forth herein.
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
30.09.2008
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Online Access | Get full text |
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Summary: | Methods are disclosed to implement bit scan operations using properties of two's complement arithmetic and compute zero index instructions. A data value may be provided and the most-significant or least-significant bit may be determined using the methods set forth herein. |
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