Data processor capable of preventing data overflows and underflows

A data processing apparatus constituting a low-cost audio/video data transmission and reception system is disclosed. A reception buffer monitoring circuit monitors the size of receiver data being accumulated in a reception buffer . When the size of accumulated data is found to become higher than a h...

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Bibliographic Details
Main Authors Yoshida, Hideki, Sato, Jin, Ikeda, Kazuyuki, Norizuki, Takashi, Sakusabe, Kenichi, Kawaguchi, Daisuke, Yoshikawa, Munehiro
Format Patent
LanguageEnglish
Published 17.06.2008
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Summary:A data processing apparatus constituting a low-cost audio/video data transmission and reception system is disclosed. A reception buffer monitoring circuit monitors the size of receiver data being accumulated in a reception buffer . When the size of accumulated data is found to become higher than a high threshold, the circuit causes a reception clock generation circuit to generate a reception clock with a higher frequency. When the accumulated data size becomes lower than a low threshold, the reception clock is generated with a lower frequency. Based on the reception clock fed from the reception clock generation circuit , an audio/video decoder decodes the audio/video data coming from the reception buffer . This invention applies advantageously to a television transmission and reception system for transmitting and receiving TV broadcast signals.