Technology dependent transformations for CMOS in digital design synthesis
The present invention pertains to automated technology dependent transformations for CMOS digital design synthesis resulting in a combination of CMOS interconnected standard-cells from a target CMOS library being mapped and transistor-level representation of the input design specification. The trans...
Saved in:
Main Authors | , |
---|---|
Format | Patent |
Language | English |
Published |
15.04.2008
|
Online Access | Get full text |
Cover
Loading…
Summary: | The present invention pertains to automated technology dependent transformations for CMOS digital design synthesis resulting in a combination of CMOS interconnected standard-cells from a target CMOS library being mapped and transistor-level representation of the input design specification. The transistor level type and portion to be represented at the transistor level representation is chosen by a user. The transistor sizing and evaluating the combination of said transistor-level representation and standard-cell mapping are performed iteratively to meet delay, size and power constraints for CMOS. |
---|