Thin film transistor array panel and manufacturing method thereof

• Main Authors: Park, Min-Wook, Baek, Bum-Ki, Lee, Jeong-Young, Choi, Kwon-Young, Kwak, Sang-Ki, Jeon, Sang-Jin
• Format: Patent
• Language: English
• Published: 22.01.2008

A method of manufacturing a thin film transistor array panel is provided, which includes: forming a gate line on a substrate; depositing a gate insulating layer and a semiconductor layer in sequence on the gate line; depositing a lower conductive film and an upper conductive film on the semiconductor layer; photo-etching the upper conductive film, the lower conductive film, and the semiconductor layer; depositing a passivation layer; photo-etching the passivation layer to expose first and second portions of the upper conductive film; removing the first and the second portions of the upper conductive film to expose first and second portions of the lower conductive film; forming a pixel electrode on the first portion of the lower conductive film; removing the second portion of the lower conductive film to expose a portion of the semiconductor layer; and forming a columnar spacer on the exposed portion of the semiconductor layer.