Semiconductor memory device with uniform data access time
A semiconductor memory device includes: a core region having a plurality of bank sets for outputting/storing a data in response to an inputted address, wherein each bank set includes one bank, one row address control unit and two column address control units; and a peripheral region having two pad g...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
04.12.2007
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Online Access | Get full text |
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Summary: | A semiconductor memory device includes: a core region having a plurality of bank sets for outputting/storing a data in response to an inputted address, wherein each bank set includes one bank, one row address control unit and two column address control units; and a peripheral region having two pad groups, wherein two pad groups are respectively located at the opposite side of the core region. |
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