Metal line having an increased resistance to electromigration along an interface of a dielectric barrier layer by implanting material into the metal line

During the formation of a metallization layer of a semiconductor device, a cap layer is formed above a metal line and subsequently an implantation process is performed so as to modify the metal in the vicinity of the interface between the cap layer and the metal line. Consequently, an improved behav...

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Main Authors Engelmann, Hans-Juergen, Zschech, Ehrenfried, Huebler, Peter
Format Patent
LanguageEnglish
Published 27.02.2007
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Abstract During the formation of a metallization layer of a semiconductor device, a cap layer is formed above a metal line and subsequently an implantation process is performed so as to modify the metal in the vicinity of the interface between the cap layer and the metal line. Consequently, an improved behavior in view of electromigration of the metal line may be obtained, thereby increasing device reliability.
AbstractList During the formation of a metallization layer of a semiconductor device, a cap layer is formed above a metal line and subsequently an implantation process is performed so as to modify the metal in the vicinity of the interface between the cap layer and the metal line. Consequently, an improved behavior in view of electromigration of the metal line may be obtained, thereby increasing device reliability.
Author Huebler, Peter
Engelmann, Hans-Juergen
Zschech, Ehrenfried
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References (WO 01/97283) 20011200
Tao et al. (6023100) 20000200
(WO 01/08213) 20010200
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Snippet During the formation of a metallization layer of a semiconductor device, a cap layer is formed above a metal line and subsequently an implantation process is...
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Title Metal line having an increased resistance to electromigration along an interface of a dielectric barrier layer by implanting material into the metal line
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