Strained silicon device manufacturing method
A method of manufacturing a microelectronic device includes forming a p-channel transistor on a silicon substrate by forming a poly gate structure over the substrate and forming a lightly doped source/drain region in the substrate. An oxide liner and nitride spacer are formed adjacent to opposing si...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
14.11.2006
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Online Access | Get full text |
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Summary: | A method of manufacturing a microelectronic device includes forming a p-channel transistor on a silicon substrate by forming a poly gate structure over the substrate and forming a lightly doped source/drain region in the substrate. An oxide liner and nitride spacer are formed adjacent to opposing side walls of the poly gate structure and a recess is etched in the semiconductor substrate on opposing sides of the oxide liner. Raised SiGe source/drain regions are formed on either side of the oxide liner and slim spacers are formed over the oxide liner. A hard mask over the poly gate structure is used to protect the poly gate structure during the formation of the raised SiGe source/drain regions. A source/drain dopant is then implanted into the substrate including the SiGe regions. |
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