Integrated circuit that processes communication packets with a buffer management engine having a pointer cache

An integrated circuit processes communication packets and comprises a pointer cache and control logic. The pointer cache store pointers that correspond to external buffers that are external to the integrated circuit and configured to store the communication packets. The control logic allocates the e...

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Bibliographic Details
Main Authors Tompkins, Joseph B, Lussier, Daniel J, Snyder, II, Wilson P
Format Patent
LanguageEnglish
Published 16.05.2006
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Summary:An integrated circuit processes communication packets and comprises a pointer cache and control logic. The pointer cache store pointers that correspond to external buffers that are external to the integrated circuit and configured to store the communication packets. The control logic allocates the external buffers as the corresponding pointers are read from the pointer cache and de-allocates the external buffers as the corresponding pointers are written back to the pointer cache.