Microcomputer and dividing circuit

Herein disclosed is a microcomputer MCU adopting the general purpose register method. The microcomputer is enabled to have a small program capacity or a high program memory using efficiency and a low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RI...

Full description

Saved in:
Bibliographic Details
Main Authors Kawasaki, Shumpei, Sakakibara, Eiji, Fukada, Kaoru, Yamazaki, Takanaga, Akao, Yasushi, Baba, Shiro, Kihara, Toshimasa, Kurakazu, Keiichi, Tsukamoto, Takashi, Masumura, Shigeki, Tawara, Yasuhiro, Kashiwagi, Yugo, Fujita, Shuya, Ishida, Katsuhiko, Sawa, Noriko, Asano, Yoichi, Chaki, Hideaki, Sugawara, Tadahiko, Kainaga, Masahiro, Noguchi, Kouki, Watabe, Mitsuru
Format Patent
LanguageEnglish
Published 07.02.2006
Online AccessGet full text

Cover

More Information
Summary:Herein disclosed is a microcomputer MCU adopting the general purpose register method. The microcomputer is enabled to have a small program capacity or a high program memory using efficiency and a low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting a fixed length instruction format having a power of 2 but a smaller bit number than that of the maximum data word length fed to instruction execution means. And, the control of the coded division is executed by noting the code bits.