Image processing apparatus which reduces noise by adjusting the transition timing
An image processing apparatus which eliminates noise which occurs due to the influence of output from a parallel bus drive circuit added to an output final stage circuit of signal processor or the like. A delay circuit which delays a video signal is inserted into a VTR signal processor such that a d...
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| Format | Patent |
| Language | English |
| Published |
08.11.2005
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| Online Access | Get full text |
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| Summary: | An image processing apparatus which eliminates noise which occurs due to the influence of output from a parallel bus drive circuit added to an output final stage circuit of signal processor or the like. A delay circuit which delays a video signal is inserted into a VTR signal processor such that a data transition point of particular bit in a bit array indicating horizontal-directional start and end positions of video signal data, added during a horizontal retrace period of a digital recording format video signal, does not overlap with a period for sampling a feedthrough period and a photoelectric conversion signal period in a correlated double sampling circuit. |
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