Multilayered dual bit memory device with improved write/erase characteristics and method of manufacturing

A dual bit ROM multilayered structure with improved write and erase functions and a method of manufacturing is disclosed. The structure includes a pair of floating gates at the middle or nitride layer to better define the two locations of electrons representing the dual data bits collected in the mi...

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Bibliographic Details
Main Authors Yang, Chin-Tien, Lin, Mu-Yi, Tseng, Yu-Wei, Ca, Min, Lee, Yu-Hua
Format Patent
LanguageEnglish
Published 18.10.2005
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Summary:A dual bit ROM multilayered structure with improved write and erase functions and a method of manufacturing is disclosed. The structure includes a pair of floating gates at the middle or nitride layer to better define the two locations of electrons representing the dual data bits collected in the middle layer.