Single ended output sense amplifier circuit with reduced power consumption and noise
This invention relates to sense amplifier circuits used in memory circuits, and more particularly, this invention relates to a sense amplifier circuits having a global data-bus line and reduced power consumption and noise. A sense amplifier circuit for a memory cell includes a sense amplifier that i...
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Main Author | |
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Format | Patent |
Language | English |
Published |
23.11.2004
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Online Access | Get full text |
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Summary: | This invention relates to sense amplifier circuits used in memory circuits, and more particularly, this invention relates to a sense amplifier circuits having a global data-bus line and reduced power consumption and noise.
A sense amplifier circuit for a memory cell includes a sense amplifier that is operable to be coupled to a memory cell via data lines, and including read bus complement and read bus true lines operative with a data output through which a data output signal is passed. An equalization circuit and enable circuit are operable with the sense amplifier. A control circuit is operable for disconnecting the data output from preferably the one of the read bus complement line and minimize unwanted transitions on the data output signal. |
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