System and method for memory arbitration
The present invention relates generally to shared memory computer systems and more particularly relates to systems and methods for performing memory access arbitration among transactions in an arbitration queue. A memory access arbitration scheme is provided where transactions to a Shared memory are...
Saved in:
Main Author | |
---|---|
Format | Patent |
Language | English |
Published |
09.11.2004
|
Online Access | Get full text |
Cover
Loading…
Summary: | The present invention relates generally to shared memory computer systems and more particularly relates to systems and methods for performing memory access arbitration among transactions in an arbitration queue.
A memory access arbitration scheme is provided where transactions to a Shared memory are stored in an arbitration queue. Prior to arbitration, the transactions are compared against the contents of cache memory, to determine which transactions will hit in cache, which will miss and which will be victims. Also prior to arbitration, the entries in the arbitration queue are grouped according to a transaction parameter, such as DRAM bank, Write to Bank, Read to Bank, etc. Arbitration is the performed among those groups which are ready for service. From the group winning arbitration, the oldest transaction is selected for servicing. Preferably, a collapsible queuing structure and method is used, such that once a transaction is serviced, higher order entries ripple down in the queue to make room for new entries while maintaining an oldest to newest relationship among the queue entries. |
---|