High-speed processor system and cache memories with processing capabilities
The present invention relates to a hierarchically-configured parallel computer system and, more particularly, to a high-speed processor system that can perform high-speed parallel processing without requiring modification of existing programming styles, to a method of using the high-speed processor...
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Main Author | |
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Format | Patent |
Language | English |
Published |
01.06.2004
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Online Access | Get full text |
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Summary: | The present invention relates to a hierarchically-configured parallel computer system and, more particularly, to a high-speed processor system that can perform high-speed parallel processing without requiring modification of existing programming styles, to a method of using the high-speed processor system, and to a recording medium.
The invention is aimed at providing a high-speed processor system capable of performing distributed concurrent processing without requiring modification of conventional programming styles.The processor system in accordance with the invention has a CPU, a plurality of parallel DRAMs, and a plurality of cache memories arranged in a hierarchical configuration. Each of the cache memories is provided with an MPU which is binarily-compatible with the CPU and which has a function to serve as a processor. |
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