Method and apparatus for generating status flags in a memory device

This invention relates in general to the asynchronous transmission of digital signals, and more particularly relates to a First-In-First-Out (FIFO) buffer in which a historical trend of the direction (ascending or descending) of change of the difference between counted READ clock pulses and counted...

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Bibliographic Details
Main Author Sindalovsky, Vladimir
Format Patent
LanguageEnglish
Published 01.06.2004
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Summary:This invention relates in general to the asynchronous transmission of digital signals, and more particularly relates to a First-In-First-Out (FIFO) buffer in which a historical trend of the direction (ascending or descending) of change of the difference between counted READ clock pulses and counted WRITE clock pulses is developed to generate buffer capacity information. A FIFO is provided which includes gray-encoded READ and WRITE counters in which partial capacity flags (referred to collectively as "WATERMARK level" flags herein) are generated when the difference between the count values in the two counters exceeds a first threshold level and which resets the flag when the difference between the count values drops below a second, lower threshold level. In accordance with the present invention, a single gray-coded WRITE pointer counter comprises a WRITE pointer register and a gray-code increment block. A READ pointer register comprises a shift register and a gray code increment block having plural stages and storing consecutive incremental WATERMARK values, based on the READ pulse count, therein. With each successive READ clock pulse, consecutive WATERMARK values are stored in the plural-stage READ pointer register, and with each READ clock pulse these values are incremented by one. The plural WATERMARK values are compared with the current value of the WRITE pointer register. By analyzing the current WRITE pointer value in connection with the plural consecutive WATERMARK values, the direction (ascending or descending) of the compared values can be determined and, due to the redundancy available from the multi-level WATERMARK values stored in the READ pointer register, hystersis is introduced so that the partial capacity flags are generated only when the difference between the READ and WRITE pulses crosses the WATERMARK level.