Gate processing method with reduced gate oxide corner and edge thinning
This invention relates generally to the manufacture of semiconductor gates, more specifically to the reduction of oxide thinning at the corners and edges of gate oxides. Disclosed is a method of processing a semiconductor gate structure on a semiconductor wafer, the method comprising providing a sem...
Saved in:
Main Authors | , , |
---|---|
Format | Patent |
Language | English |
Published |
02.12.2003
|
Online Access | Get full text |
Cover
Loading…
Summary: | This invention relates generally to the manufacture of semiconductor gates, more specifically to the reduction of oxide thinning at the corners and edges of gate oxides.
Disclosed is a method of processing a semiconductor gate structure on a semiconductor wafer, the method comprising providing a semiconductor structure with an active device area capped with a pad oxide layer bounded by one or more isolation trenches, providing a sacrificial oxide layer by thickening said pad oxide layer to a desired oxide thickness, in using said thickened pad oxide layer as said sacrificial oxide layer for device implantation, stripping said sacrificial pad oxide layer after use, and capping said semiconductor gate with a final gate oxide layer. |
---|