Method for manufacturing a high power semiconductor device having a field plate extendedly disposed on a gate

• Main Author: Oh, Han-Su
• Format: Patent
• Language: English
• Published: 02.09.2003

1. Field of the Invention A method to fabricate a high voltage transistor of a smart power device is discussed. The method includes forming a well of first conductivity in a substrate of second conductivity; forming a drift layer of the second conductivity in the well; forming a source region of the second conductivity in the well between a substrate/well junction and a well/drift layer junction; forming a drain region of the second conductivity in the drift layer, the drain region having relatively higher concentration of dopants relative to the drift layer; and forming a first field oxide layer on the drift layer such that the first field oxide layer is spaced apart from the drain region.