Programming thermal test chip arrays

• Main Author: Tarter, Thomas S
• Format: Patent
• Language: English
• Published: 06.05.2003

The present invention relates to the field of integrated circuit testing, and more particularly, to the testing of the thermal characteristics of a semiconductor package. A thermal test chip array and method of forming the same allows access to any test die in the array regardless of the size of the array. The thermal test chip arrangement has a plurality of thermal test chips arranged in an array, each thermal test chip having a heating circuit and a temperature-sensing circuit. A first set of conductive lines traverse unbroken across the entire array. The heating circuit of each thermal test chip is connected to some of the first set of conductive lines. These conductive lines provide power to the heating circuits of the thermal test chips. A second set of conductive lines traverse unbroken across the entire array with the temperature-sensing circuit of each thermal test chip being connected to some of the second set of conductive lines. Power is carried to the temperature sensing circuits of the thermal test chips by the second set of conductive lines.