Self-timed CMOS static logic circuit

The present invention relates in general to logic circuitry, and in particular, to self-timed logic circuitry. A Self-Timed CMOS Static Circuit Technique has been invented that provides full handshaking to the source circuits; prevention of input data loss by virtue off interlocking both internal an...

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Bibliographic Details
Main Authors Durham, Christopher McCall, Klim, Peter Juergen
Format Patent
LanguageEnglish
Published 18.02.2003
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Summary:The present invention relates in general to logic circuitry, and in particular, to self-timed logic circuitry. A Self-Timed CMOS Static Circuit Technique has been invented that provides full handshaking to the source circuits; prevention of input data loss by virtue off interlocking both internal and incoming signals; full handshaking between the circuit and sink self-timed circuitry; prevention of lost access operation information by virtue of an internal lock-out for the output data information; and plug-in compatibility for some classes of dynamic self-timed systems. The net result of the overall system is that static CMOS circuits can now be used to generate a self-timed system. This is in contrast to existing self-timed systems that rely on dynamic circuits. Thus, the qualities of the static circuitry can be preserved and utilized to their fullest advantage.