Write buffer with burst capability

This invention relates in general to memory writing and, more specifically, to an apparatus and methods for allowing burst writes to memory. Methods and an apparatus for buffering write operations are disclosed. In one embodiment, a processing system bursts data to a bus. The processing system inclu...

Full description

Saved in:
Bibliographic Details
Main Authors Yoshioka, Shinichi, Wang, Hsuan-Wen, Chopra, Rajesh, Tsong, Jun-Wen
Format Patent
LanguageEnglish
Published 17.12.2002
Online AccessGet full text

Cover

More Information
Summary:This invention relates in general to memory writing and, more specifically, to an apparatus and methods for allowing burst writes to memory. Methods and an apparatus for buffering write operations are disclosed. In one embodiment, a processing system bursts data to a bus. The processing system includes a memory cache, a write buffer unit, and a control unit. The memory cache produces an address and data. Included in the write buffer unit are a plurality of data locations coupled to the memory cache. The control unit directs the first data to any of the plurality of data locations.