Method of manufacturing vertical semiconductor device

The present invention relates, in general, to field effect transistors, and more particularly to field effect transistors having low threshold voltages. An n-channel device () and a p-channel device () are formed from a single epitaxial silicon layer (). During the deposition of the single epitaxial...

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Bibliographic Details
Main Authors Tang, Zhirong, Park, Heemyong, Ford, Jenny M
Format Patent
LanguageEnglish
Published 10.12.2002
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Summary:The present invention relates, in general, to field effect transistors, and more particularly to field effect transistors having low threshold voltages. An n-channel device () and a p-channel device () are formed from a single epitaxial silicon layer (). During the deposition of the single epitaxial silicon layer (), dopants are added to the epitaxial reaction chamber and subsequently changed to define a drain region (), a channel region (), and a source region (). The dopant concentration is modified during the formation of the channel region () to create a doping profile (). The doping profile () has a first profile () that is constant and a second profile () that changes.