Semiconductor device manufacturing method

• Main Authors: Kono, Ryuji, Ariga, Akihiko, Aoki, Hideyuki, Ohta, Hiroyuki, Endo, Yoshishige, Kanamaru, Masatoshi, Hosogane, Atsushi, Tanaka, Shinji, Ban, Naoto, Miura, Hideo
• Format: Patent
• Language: English
• Published: 12.11.2002

The present invention relates to a semiconductor device manufacturing method including an inspection step for inspecting the circuit elements of manufactured semiconductor devices and, more particularly, to a semiconductor device manufacturing method or a semiconductor device inspecting method which is suited to make the inspection step simple and efficient and to a jig for use in such methods. Semiconductor device chips manufacturing and inspecting method is disclosed in which a semiconductor wafer is cut into individual LSI chips. The LSI chips are rearranged and integrated into a predetermined number. The cut LSI chips are integrated in a jig having openings with a size commensurate with the dimensions of the LSI chip. At least one part of the jig having such openings has a coefficient of thermal expansion that is approximately equal to that of the LSI chips. The integrated predetermined number of chips are subjected to an inspection process in a subsequent inspection step thereby improving efficiency and reducing cost.