Method for producing a semiconductor memory device with a multiplicity of memory cells

• Main Authors: Widmann, Dietrich, Tempel, Georg
• Format: Patent
• Language: English
• Published: 22.10.2002

The invention relates to a method for producing a semiconductor memory device having a multiplicity of memory cells disposed on a semiconductor substrate, wherein each of the memory cells has a selection transistor being disposed in a semiconductor substrate and having a gate terminal and first and second electrode terminals, each of the memory cells has a storage capacitor being associated with and triggerable by the selection transistor and having a ferroelectric dielectric and first and second capacitor electrodes, the gate terminal of each selection transistor is connected to a word line of the semiconductor memory device, the first electrode terminal of each selection transistor is connected to a bit line, and the first capacitor electrode of each storage capacitor is connected to a common conductor layer of electrically conductive material. The invention also relates to a method for producing such a semiconductor memory device. A method for producing a capacitor having a dielectric and first and second capacitor electrodes in a semiconductor circuit device formed on a semiconductor substrate, includes forming a trench in a layer applied to the substrate. An electrically conductive layer for the second capacitor electrode is deposited inside the trench and at least regionally conformally with side walls thereof. An auxiliary layer acting as a space-holder for the dielectric is conformally deposited inside the trench and on the electrically conductive layer for the second capacitor electrode. An electrically conductive layer for the first capacitor electrode is conformally deposited inside the trench and on the auxiliary layer. The auxiliary layer is at least partially removed to expose a hollow layer in at least a partial region between the two electrically conductive layers for the first and second capacitor electrodes. The dielectric is deposited into the exposed hollow layer between the two electrically conductive layers. A semiconductor memory device and a method for producing the device include producing the capacitor after production of the transistor and metallizing layers associated therewith for connection of the word and bit lines, in a configuration projecting upward from the plane; placing the capacitor in a trench formed inside a contact metallizing layer for the second electrode terminal of the transistor; and setting a depth of the trench to be equivalent to a layer thickness of the metallizing layer.