Test structures for substrate etching

This invention relates to parametric test structures for integrated circuits, more particularly, this invention relates to a test structure to measure the depth of etching in resistive substrates. A test structure determines the trench depth from etching in a resistive substrate. The test structure...

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Bibliographic Details
Main Author Tom, Dennis W
Format Patent
LanguageEnglish
Published 28.05.2002
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Summary:This invention relates to parametric test structures for integrated circuits, more particularly, this invention relates to a test structure to measure the depth of etching in resistive substrates. A test structure determines the trench depth from etching in a resistive substrate. The test structure has a first contact and a second contact to the substrate. Between the first and second contact is disposed an etch window. A measurement of resistance between the first contact and the second contact is indicative of the depth of etching in the etch window.