Detached drain MOSFET

• Main Authors: Gardner, Mark I, Fulford, Jr., H. Jim
• Format: Patent
• Language: English
• Published: 14.05.2002

1. Field of the Invention A detached drain transistor including a semiconductor substrate, a source impurity distribution, a drain impurity distribution, a gate dielectric, and a conductive gate. The source impurity distribution is substantially contained within a source region of the semiconductor substrate. The drain impurity distribution is substantially contained within a detached drain region of the semiconductor substrate. The gate dielectric is formed on an upper surface of the semiconductor substrate. The conductive gate is formed on the gate dielectric and laterally disposed over a channel region of the semiconductor substrate. The channel region extends laterally between the source region of the semiconductor substrate and the detached drain region. The channel boundary of the detached drain region is laterally displaced from a first sidewall of the conductive gate by a detached displacement. Preferably, the gate dielectric is a thermal oxide having a thickness of approximately 20 to 200 angstroms. The conductive gate preferably comprises polysilicon having a sheet resistivity of less than approximately 500 /square. Alternatively, the conductive gate may comprise a metal of aluminum, copper, tungsten or alloys thereof. The lateral dimension of the conductive gate is ideally less than approximately 0.3 microns, while the drain displacement, in this embodiment, is approximately 500 to 1500 angstroms.