Flash memory process using polysilicon spacers

The present invention relates to the field of semiconductor electronic devices and a method for manufacturing the same. More particularly, the present invention relates to a process suited for manufacturing erasable programmable read-only memory cells. An EPROM cell and a method that includes a gate...

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Bibliographic Details
Main Authors Su, Wen-Doe, Chang, Thomas, Sung, Kuo-Tung, Tseng, Mao Song, Lai, Shih-Chi, Sung, Kun-Yu, Lin, Liang-Chen
Format Patent
LanguageEnglish
Published 02.04.2002
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Summary:The present invention relates to the field of semiconductor electronic devices and a method for manufacturing the same. More particularly, the present invention relates to a process suited for manufacturing erasable programmable read-only memory cells. An EPROM cell and a method that includes a gate structure having a sidewall spacer. The sidewall spacer is made by way of an amorphous or polycrystalline silicon layer, which is converted into an insulating layer such as silicon dioxide. Deposition of the amorphous or polycrystalline silicon layer is more accurate and produces a more uniform layer than conventional dielectric layer deposition.