Method of manufacturing DRAM capacitor

• Main Authors: Liu, Haochieh, Chen, Hsi-Chuan, Chang, Jung-Ho, Tsai, Hong-Hsiang, Wang, Li-Ming, Huang, Sen-Huan, Sheu, Bor-Ru, Hsieh, Wen-Kuei
• Format: Patent
• Language: English
• Published: 05.03.2002

This application claims the priority benefit of Taiwan application Ser. No. 89111023, filed Jun. 7, 2000. A method of manufacturing DRAM capacitor. An active region is formed above a substrate. A plurality of parallel word lines is formed above the substrate. A first plug and a second plug are formed between the word lines in locations for forming the desired bit line contact and node contact, respectively. Insulation material is deposited into the remaining space between the word lines. A bit line contact is formed above the first plug. A plurality of parallel bit lines is formed above the substrate. The bit lines are perpendicular to the word lines. The bit line is electrically connected to the substrate through the bit line contact and the first plug. The bit lines are electrically insulated from each other. Furthermore, each bit line is covered on top by a hard material layer. Finally, a node contact is formed over the second plug.