IC conductor capacitance estimation method

An RC extraction tool estimates capacitances of conductors residing along parallel grid lines on each of a set vertically stacked layers of insulating material of an IC based on data contained in a IC layout file describing positions of structures forming the IC. The tool initially processes the lay...

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Bibliographic Details
Main Authors Teng, Chin-Chi, Pramono, Eddy
Format Patent
LanguageEnglish
Published 25.11.2004
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Summary:An RC extraction tool estimates capacitances of conductors residing along parallel grid lines on each of a set vertically stacked layers of insulating material of an IC based on data contained in a IC layout file describing positions of structures forming the IC. The tool initially processes the layout file to generate a separate database for each layer. Each database includes a separate table for each grid line on its corresponding layer, and each table includes a separate entry for each conductor residing along that grid line containing data indicating dimensions and a position of its corresponding conductor along that grid line. The tool processes the databases for each layer in ascending order to estimate capacitances between conductors on that layer and to generate set of data structures mapping the amount of conductor surface area on that layer to areas of layers above that layer, and to areas of layers below that layer in which conductors reside. The tool then processes the data structures to estimate capacitances between conductors on nearby layers.